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.Dd December 21, 2022
.Dt AG_CPUINFO 3
.Os Agar 1.7
.Sh NAME
.Nm AG_CPUInfo
.Nd agar architecture information structure
.Sh SYNOPSIS
.Bd -literal
#include <agar/core.h>
.Ed
.Sh DESCRIPTION
The agar
.Nm
interface provides some information about the current architecture and
architecture extensions.
.Sh INTERFACE
.nr nS 1
.Ft "void"
.Fn AG_GetCPUInfo "AG_CPUInfo *info"
.Pp
.nr nS 0
The
.Fn AG_GetCPUInfo
function returns CPU information into an existing
.Fa info
structure.
.Sh STRUCTURE DATA
For the
.Fa AG_CPUInfo
structure:
.Bl -tag -width "char vendorID[13] "
.It const char *arch
A string describing the architecture (e.g., "alpha", "i386", etc).
.It char vendorID[13]
A vendor ID string (architecture-specific).
.It Uint32 ext
A list of architecture extensions that have some relevance to user
applications (see
.Sx ARCHITECTURE EXTENSIONS
below).
.El
.Sh ARCHITECTURE EXTENSIONS
The
.Fa ext
field can contain the following flags:
.Bl -tag -compact -width "AG_EXT_3DNOW_PREFETCH "
.It AG_EXT_CPUID
The i386 CPUID instruction is supported.
.It AG_EXT_MMX
MMX instructions are available.
.It AG_EXT_MMX_EXT
AMD extensions to MMX are available.
.It AG_EXT_3DNOW
3dNow! is supported.
.It AG_EXT_3DNOW_EXT
Extended 3dNow! is supported.
.It AG_EXT_ALTIVEC
AltiVec instructions are supported.
.It AG_EXT_SSE
Streaming SIMD extensions are supported.
.It AG_EXT_SSE2
SSE2 extensions are supported.
.It AG_EXT_SSE3
SSE3 (PNI) extensions are supported.
.It AG_EXT_LONG_MODE
Long mode is available.
.It AG_EXT_RDTSCP
The RDTSCP instruction exists.
.It AG_EXT_FXSR
Fast FXSAVE/FXSTOR is available.
.It AG_EXT_PAGE_NX
The per-page no-execute bit (W^X) is supported.
.It AG_EXT_SSE5A
SSE5A extensions are available.
.It AG_EXT_3DNOW_PREFETCH
The PREFETCH and PREFETCHW instructions for 3dNow! are available.
.It AG_EXT_SSE_MISALIGNED
Misaligned SSE mode is supported.
.It AG_EXT_SSE4A
SSE4A extensions are available.
.It AG_EXT_ONCHIP_FPU
The floating point unit is on-chip.
.It AG_EXT_TSC
The Time Stamp Counter is available.
.It AG_EXT_CMOV
The CMOV (Conditional Move) instruction exists.
.It AG_EXT_CLFLUSH
The CLFLUSH (Cache Line Flush) instruction exists.
.It AG_EXT_HTT
Hyper-Threading technology is supported.
.It AG_EXT_MON
MONITOR and MWAIT instructions exist.
.It AG_EXT_VMX
Virtual Machine Extensions are available.
.It AG_EXT_SSSE3
SSSE3 extensions are available.
.It AG_EXT_SSE41
SSE4.1 extensions are available.
.It AG_EXT_SSE42
SSE4.2 extensions are available.
.El
.Sh EXAMPLES
The following code prints architecture information:
.Bd -literal -offset indent
.\" SYNTAX(c)
AG_CPUInfo cpu;

AG_GetCPUInfo(&cpu);
AG_Verbose("Architecture: %s\\n", cpu.arch);
AG_Verbose("Vendor ID: %s\\n", cpu.vendorID);
AG_Verbose("AltiVec: %s\\n", (cpu.ext & AG_EXT_ALTIVEC) ? "Yes" : "No");
AG_Verbose("SSE: %s\\n", (cpu.ext & AG_EXT_SSE) ? "Yes" : "No");
.Ed
.Sh SEE ALSO
.Xr AG_Intro 3
.Sh HISTORY
The
.Nm
interface first appeared in Agar 1.3.4.